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 19-2081; Rev 1; 12/02
+3.3V, 2.5Gbps Low-Power Laser Driver
General Description
The MAX3273 is a compact, low-power laser driver for applications up to 2.7Gbps. The device uses a single +3.3V supply and typically consumes 30mA. The bias and modulation current levels are programmed by external resistors. An automatic power-control (APC) loop is incorporated to maintain a constant average optical power over temperature and lifetime. The laser driver is fabricated using Maxim's in-house, secondgeneration SiGe process. The MAX3273 accepts differential CML-compatible clock and data input signals. Inputs are self-biased to allow AC-coupling. An input data-retiming latch can be enabled to reject input jitter if a clock signal is available. The driver can provide bias current up to 100mA and modulation current up to 60mAP-P with typical (20% to 80%) edge speeds of 59ps. A failure-monitor output is provided to indicate when the APC loop is unable to maintain average optical power. The MAX3273 is available in a 4mm 4mm, 24-pin QFN package, as well as in die form. o 30mA Power-Supply Current o Single +3.3V Power Supply o Up to 2.7Gbps (NRZ) Operation o Automatic Average Power Control with Failure Monitor o Programmable Modulation Current from 5mA to 60mA o Programmable Bias Current from 1mA to 100mA o Typical Fall Time of 59ps o Selectable Data Retiming Latch o Complies with ANSI, ITU, and Bellcore SDH/SONET Specifications
Features
MAX3273
Ordering Information
PART MAX3273EGG MAX3273E/D TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 24 QFN-EP* (4mm x 4mm) Dice**
Applications
SONET OC-48 and SDH STM-16 Transmission Systems Add/Drop Multiplexers Digital Cross-Connects 2.5Gbps Optical Transmitters
*EP=Exposed pad. **Dice are designed to operate from TA = -40C to +85C, but are tested and guaranteed at TA = +25C only. Pin Configuration appears at end of data sheet.
Typical Application Circuit
VCC 0.01F VCC APCFILT1 VCC APCFILT2 LATCH 25 OUTLP2 DATA OUT+ 25 0.056F 20 LP1 LP1
DATA +
50 100
DATA +
DATA 2.5Gbps SERIALIZER WITH CLOCK GENERATION CLK+
50
MAX3273
50 100 MODSET BIASMAX APCSET GND CLK+ BIAS
FAIL
EN
CLK-
50
CLK-
MD 500pF
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.
Covered by U.S. patent number 5,883,910. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC..............................................-0.5V to +6.0V Current into BIAS, OUT+, OUT- ......................-20mA to +150mA Current into MD.....................................................-5mA to +5mA Voltage at DATA+, DATA-, CLK+, CLK-, LATCH, EN, FAIL..........................-0.5V to (VCC + 0.5V) Voltage at MODSET, BIASMAX, APCSET, APCFILT1, APCFILT2.........................-0.5V to +3.0V Voltage at BIAS .........................................+1.0V to (VCC + 1.5V) Voltage at OUT+, OUT-.............................+1.5V to (VCC + 1.5V) Current into FAIL ...............................................-10mA to +10mA Continuous Power Dissipation (TA = +85C) 24-Pin QFN (derate 274mW/C above +85C) ..........1781mW Storage Temperature Range .............................-55C to +150C Operating Junction Temperature ......................-55C to +150C Die Attach Temperature (die) ..........................................+400C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA = -40C to +85C. Typical values are at VCC = +3.3V, IBIAS = 60mA, IMOD = 30mA, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Supply Current Bias-Current Range Bias Off-Current Bias-Current Stability Bias-Current Absolute Accuracy Differential Input Voltage Common-Mode Input Voltage TTL Input High Voltage TTL Input Low Voltage TTL Output High TTL Output Low MD Voltage Monitor Diode DC-Current Range Monitor-Diode Bias Set Point Stability Monitor-Diode Bias Absolute Accuracy IMD (Note 3) IMD = 1000A IMD = 18A 18 -480 -480 -15 83 159 VID VICM VIH VIL VOH VOL Sourcing 50A Sinking 100A 2.4 0.4 1.6 1000 +480 +480 +15 SYMBOL ICC IBIAS CONDITIONS Excluding IBIAS and IMOD Voltage on BIAS pin (VBIAS) = VCC - 1.6V EN = high (Note 2), VBIAS 2.6V APC open loop (Note 3) APC open loop (Note 4) Figure 1 IBIAS = 100mA IBIAS = 1mA -15 0.2 VCC 1.49 2.0 0.8 VCC 1.32 61 198 +15 1.6 VCC VID/4 1 MIN TYP 30 MAX 45 100 0.2 UNITS mA mA mA ppm/C % VP-P V V V V V V A ppm/C %
2
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA = -40C to +85C. Typical values are at VCC = +3.3V, IBIAS = 60mA, IMOD = 30mA, TA = +25C, unless otherwise noted.) (Notes 5, 6)
PARAMETER Modulation-Current Range Modulation Off-Current Modulation-Current Stability Modulation-Current Absolute Accuracy Output Current Rise Time Output Current Fall Time Output Overshoot/Undershoot Enable and Startup Delay Maximum Consecutive Identical Digits Pulse-Width Distortion Random Jitter Input Latch Setup Time Input Latch Hold Time TSU THD LATCH = high (Figure 1) LATCH = high (Figure 1) PWD (Notes 7, 8) tR tF SYMBOL IMOD (Note 3) EN = high IMOD = 60mA IMOD = 5mA (Note 4) 20% to 80% (Note 7) 20% to 80% (Note 7) (Note 7) APC open loop 80 3 1.0 75 0 45 1.5 150 50 -480 -480 -15 52 59 15 364 64 34 CONDITIONS MIN 5 TYP MAX 60 0.2 +480 +480 +15 87 104 UNITS mA mA ppm/C % ps ps % ns bits ps psRMS ps ps
MAX3273
Specifications at -40C are guaranteed by design and characterization. Dice are tested at TA= +25C only. Both the bias and modulation currents are switched off if any of the current set pins is grounded. Guaranteed by design and characterization. Accuracy refers to part-to-part variation. AC characterization was performed by using the circuit in Figure 2. AC characteristics are guaranteed by design and characterization, and measured using a 2.5Gbps 213 - 1 PRBS input data pattern with 80 consecutive zeros and 80 consecutive ones added. Note 7: Measured using a 2.5Gbps repeating 0000 1111 pattern. Note 8: PWD = (wide pulse - narrow pulse) / 2. Note 1: Note 2: Note 3: Note 4: Note 5: Note 6:
_______________________________________________________________________________________
3
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
CLK+ VIS = 0.1V TO 0.8V CLKTSU DATAVIS = 0.1V TO 0.8V DATA+ THD
VID = 0.2V TO 1.6V
(DATA+) - (DATA-)
5mA TO 60mA IMOD
Figure 1. Required Input Signal and Setup/Hold-Time Definition
VCC LP1 = MURATA BLM11HA601SPT LP2 = MURATA BLM21HA102SPT LP3 = COILCRAFT D01607C-333
LP3 LP2 LP2 LP1
MAX3273 OUT-
LP1
25
OSCILLOSCOPE 0.056F 50 0.056F VCC 50 50
OUT+
BIAS 15
Figure 2. Output Termination for Characterization
4
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver
Typical Operating Characteristics
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
ELECTRICAL EYE DIAGRAM (IMOD = 20mA, 213 - 1 80CID)
MAX3273 toc01
MAX3273
ELECTRICAL EYE DIAGRAM (IMOD = 60mA, 213 - 1 80CID)
MAX3273 toc02
400mV/div 125mV/div
60ps/div
60ps/div
OPTICAL EYE DIAGRAM (2.488Gbps, 1300nm FP LASER, 1.87GHz FILTER)
MAX3273 toc03
IBIASMAX vs. RBIASMAX
MAX3273 toc04
IMOD vs. RMODSET
80 70 60 IMOD (mA) 50 40 30 20
MAX3273 toc05
140 120 100 IBIASMAX (mA) 80 60 40 20 0
90
10 0 0.1 1 10 RBIASMAX (k) 100 1000 0.1 1 10 RMODSET (k) 100
57ps/div MITSUBISHI ML725C8F LASER DIODE
IMD vs. RAPCSET
MAX3273 toc06
SUPPLY CURRENT vs. TEMPERATURE
90 80 SUPPLY CURRENT (mA) 70 60 50 40 30 20 EXCLUDE IBIAS, IMOD 25 LOAD
MAX3273 toc07
1.4 1.2 1.0 IMD (mA) 0.8 0.6 0.4 0.2 0 0.1 1 RAPCSET (k) 10
100
10 0 100 -40 -15 10 35 60 85 TEMPERATURE (C)
_______________________________________________________________________________________
5
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Typical Operating Characteristics (continued)
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
PULSE-WIDTH DISTORTION vs. IMOD
MAX3273 toc08
TYPICAL DISTRIBUTION OF IMOD RISE TIME
IMOD = 60mA MEAN = 52.27ps STDEV = 1.57ps
MAX3273 toc09 MAX3273 toc11
25 20 15 PWD (ps) 10 5 0 -5 -10 -15 5 15 25 35 IMOD (mA) 45 55
50
40 PERCENT OF UNITS (%)
30
20
10
0 65 49.0 50.5 52.0 53.5 55.0 56.5 58.0 59.5 RISE TIME (ps)
TYPICAL DISTRIBUTION OF IMOD FALL TIME
IMOD = 5mA MEAN = 63.23ps STDEV = 1.21ps PERCENT OF UNITS (%) 30
MAX3273 toc10
TYPICAL DISTRIBUTION OF IMOD FALL TIME
60 50 PERCENT OF UNITS (%) 40 30 20 10 IMOD = 60mA MEAN = 59.41ps STDEV = 1.33ps
40
20
10
0 60 61 62 63 64 65 66 67 FALL TIME (ps)
0 57 58 59 60 61 62 63 64 FALL TIME (ps)
TYPICAL DISTRIBUTION OF IMOD RISE TIME
IMOD = 5mA MEAN = 48.57ps STDEV = 1.48ps PERCENT OF UNITS (%) 30
MAX3273 toc12
40
20
10
0 45 46 47 48 49 50 51 52 53 RISE TIME (ps)
6
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Pin Description
PIN 1, 4, 13, 15, 18 2 3 5 6 7, 9, 12 8 10 11 14 16 17 19 20 21 22 23 NAME VCC DATA+ DATACLK+ CLKGND LATCH EN MODSET BIAS OUT+ OUTMD APCFILT1 APCFILT2 FAIL APCSET Power-Supply Voltage Noninverting Data Input, with On-Chip Biasing Inverting Data Input, with On-Chip Biasing Noninverting Clock Input for Data Retiming, with On-Chip Biasing Inverting Clock Input for Data Retiming, with On-Chip Biasing Ground Data Retiming Enable Input, Active-High. Retiming disabled when floating or pulled low. TTL/CMOS Enable Input. Low for normal operation. Float or pull high to disable laser bias and modulation currents. Internal 100k pullup to VCC. A resistor connected from this pin to ground sets the desired modulation current. Laser Bias Current Output. Connect to the laser through an inductor. Positive Modulation-Current Output. IMOD flows into this pin when input data is high. Negative Modulation-Current Output. Current flows into this pin when input data is low. Connect to load equivalent to that on OUT+ to maintain differential output balance. Monitor Diode Input. Connect this pin to the anode of the monitor diode. Leave floating for open-loop operation. A capacitor between APCFILT1 and APCFILT2 sets the dominant pole of the APC feedback loop (CAPCFILT = 0.01F). Ground APCFILT1 for open-loop operation. See above. TTL/CMOS Failure Output, Active-Low. Indicates APC failure when low. A resistor connected from this pin to ground sets the desired average optical power. Connect a 100k resistor to GND for open-loop operation. A resistor connected from this pin to ground sets the maximum bias current. The APC function can subtract current from this maximum value, but cannot add to it. For open-loop operation, this pin sets the laser bias current. Ground. Solder this pad to ground. FUNCTION
24
BIASMAX EXPOSED PAD
EP
_______________________________________________________________________________________
7
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
VCC LATCH LP1 0 MUX DATA D Q 1 IMOD LP1 CLK VCC LP2 IBIAS OUT+ OUTCD RD 25 VCC
MAX3273
BIAS VCC FAILURE DETECTOR TIA x160 VBG 500pF IAPCSET MD FAIL IMD
EN
x190
MODSET RMODSET
BIASMAX RBIASMAX
APCFILT1 CAPCFILT
APCFILT2
APCSET RAPCSET
Figure 3. Functional Diagram
Detailed Description
The MAX3273 laser driver consists of two main parts: a high-speed modulation driver and a laser-biasing block with automatic power control (APC). The circuit design is optimized for both high-speed and low-voltage (+3.3V) operation. To minimize the jitter of the input signal at speeds as high as 2.7Gbps, the device accepts a differential CML clock signal for data retiming. When LATCH is high, the input data is synchronized by the clock signal. When LATCH is low, the input data is directly applied to the output stage. The output stage is composed of a high-speed differential pair and a programmable modulation current source. Because the modulation output drives a maximum current of 60mA into the laser with an edge speed of 59ps, large transient voltage spikes can be generated (due to the parasitic inductance of the laser). These transients and the laser-forward voltage leave insuffi8
cient headroom for the proper operation of the laser driver if the modulation output is DC-coupled to the laser diode. To solve this problem, the MAX3273's modulation output is AC-coupled to the cathode of a laser diode. An external pullup inductor is necessary to DCbias the modulation output at VCC. Such a configuration isolates laser-forward voltage from the output circuitry and the supply voltage VCC. A simplified functional diagram is shown in Figure 3. The MAX3273 modulation output is optimized for driving a 25 load. Modulation current swings of 75mA are possible, but because of minimum power-supply and jitter requirements at 2.5Gbps, the specified maximum modulation current is limited to 60mA. To interface with the laser diode, a damping resistor (RD) is required for impedance matching. An RC-shunt network might also be necessary to compensate for the laser-diode parasitic inductance, thereby improving the
_______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver
optical output ringing and duty-cycle distortion. Refer to Maxim application note HFAN 02.0, Interfacing Maxim Laser Drivers with Laser Diodes, for more information. At the data rate of 2.5Gbps, any capacitive load at the cathode of a laser diode degrades the optical output performance. Because the BIAS output is directly connected to the laser cathode, the parasitic capacitance associated with this pin is minimized by using an inductor to isolate the BIAS pin from the laser cathode.
Output Enable
The MAX3273 incorporates a TTL/CMOS input to enable the output. When EN is low, the modulation and bias outputs are enabled. When EN is high or floating, both the bias and modulation currents are off. The typical enable time is 364ns, and the typical disable time is 27ns when the bias is operated open loop.
MAX3273
Slow-Start
For laser safety reasons, the MAX3273 incorporates a slow-start circuit that provides a delay of 364ns for enabling a laser diode.
Automatic Power Control (APC)
To maintain constant average optical power, the MAX3273 incorporates an APC loop to compensate for the changes in laser threshold current over temperature and lifetime. A back-facet photodiode mounted in the laser package is used to convert the optical power into a photocurrent. The APC loop adjusts the laser bias current so that the monitor current is matched to a reference current set by RAPCSET. The time constant of the APC loop is determined by an external capacitor (CAPCFILT). To minimize the pattern-dependent jitter associated with the APC loop-time constant, and to guarantee loop stability, the recommended value for CAPCFILT is 0.01F. When the APC loop is functioning, the maximum allowable bias current is set by an external resistor, RBIASMAX. An APC failure flag (FAIL) is asserted low when the bias current can no longer be adjusted to achieve the desired average optical power. APC closed-loop operation requires the user to set three currents with external resistors connected between ground and BIASMAX, MODSET, and APCSET (see Figure 3). Detailed guidelines for these resistor settings are described in the Design Procedure section.
APC Failure Monitor
The MAX3273 provides an APC failure monitor (TTL/CMOS) to indicate an APC loop tracking failure. FAIL is asserted low when the APC loop no longer can regulate the bias current to maintain the desired monitor diode current. FAIL asserts low when the APC loop is disabled.
Short-Circuit Protection
The MAX3273 provides short-circuit protection for the modulation and bias current sources. If BIASMAX, MODSET, or APCSET is shorted to ground, the bias and modulation output turns off.
Design Procedure
When designing a laser transmitter, the optical output usually is expressed in terms of average power and extinction ratio. Table 1 gives relationships helpful in converting between the optical average power and the modulation current. These relationships are valid if the mark density and duty cycle of the optical waveform are 50%.
Open-Loop Operation
If necessary, the MAX3273 is fully operational without APC. To disable the APC loop, ground the APCFILT1 pin. In this case, the laser current is directly set by two external resistors connected from ground to BIASMAX and MODSET. See the Design Procedure section for more details on open-loop operation.
Programming the Modulation Current
For a given laser power (PAVG), slope efficiency (), and extinction ration (re), the modulation current can be calculated using Table 1. See the I MOD vs. R MODSET graph in the Typical Operating Characteristics and select the value of RMODSET that corresponds to the required current at +25C. The equation below provides a derivation of the modulation current using Table 1. IMOD = 2 x PAVE r -1 xe re + 1
Optional Data Input Latch
To minimize jitter in the input data, connect a synchronous differential clock signal to the CLK+ and CLKinputs. When the LATCH control input is tied high, the input data is retimed on the rising edge of CLK+. If LATCH is tied low or left floating, the retiming function is disabled and the input data is directly connected to the output stage. When this latch function is not used, connect CLK+ to VCC and leave CLK- unconnected.
_______________________________________________________________________________________
9
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Programming the Bias Current with APC Disabled
When using the MAX3273 in open-loop operation, the bias current is determined by the RBIASMAX resistor. To select this resistor, see the IBIASMAX vs. RBIASMAX graph in the Typical Operating Characteristics and select the value of RBIASMAX that corresponds to the required IBIASMAX at +25C. Ground the APCFILT1 pin for openloop operation.
Pattern-Dependent Jitter
When transmitting NRZ data with long strings of consecutive identical digits (CIDs), LF droop can occur and contribute to pattern-dependent jitter (PDJ). To minimize this PDJ, three external components must be properly chosen: capacitor (CAPCFILT), which dominates the APC loop time constant; pullup inductor (LP); and AC-coupling capacitor (CD). To filter out noise effects and guarantee loop stability, the recommended value for CAPCFILT is 0.01F. This results in an APC loop bandwidth of 100kHz or a time constant of 15s. As a result, the PDJ associated with an APC loop time constant can be ignored. The time constant associated with the output pullup inductor (LP LP2) and the AC-coupling capacitor (CD) affects the PDJ. For such a second-order network, the PDJ is dominated by LP because of the low frequency cutoff. For a data rate of 2.5Gbps, the recommended value for CD is 0.056F. During the maximum CID period, limit the peak voltage droop to less than 12% of the average (6% of the amplitude). The time constant can be estimated by:
-t
Programming the Bias Current with APC Enabled
When the MAX3273's APC feature is used, program the average optical power by adjusting the APCSET resistor. To select this resistor, determine the desired monitor current to be maintained over temperature and life. See the I MD vs. R APCSET graph in the Typical Operating Characteristics and select the value of RAPCSET that corresponds to the required current. When using the MAX3273 in closed-loop operation, the RBIASMAX resistor sets the maximum bias current available to the laser diode over temperature and life. The APC loop can subtract from this maximum value but cannot add to it. See the IBIASMAX vs. RBIASMAX graph in the Typical Operating Characteristics and select the value of RBIASMAX that corresponds to the end-of-life bias current at +85C.
12% = 1 - e LP LP = 7.8t If LP = LP / 25, and t = 100UI 40ns, then LP = 7.8H. To reduce the physical size of this element (LP), use of SMD ferrite beads is recommended (Figure 2). To achieve even greater immunity to droop, use an optional third inductor (33H, LP3 in Figure 2).
Interfacing with Laser Diodes
To minimize optical output aberrations caused by signal reflections at the electrical interface to the laser diode, a series-damping resistor (RD) is required (see the Typical Application Circuit). Additionally, the MAX3273 outputs are optimized for a 25 load. Therefore, the series combination of RD and RL (where RL represents the laser-diode resistance) should equal 25. Typical values for RD are 18 to 23. For best performance, a bypass capacitor (0.01F typical) should be placed as close as possible to the anode of the laser diode. Depending on the exact characteristics of the laser diode and PC board layout, a resistor (RP) of 50 to 100 in parallel with pullup inductor LP1 can be useful in damping overshoot and ringing in the optical output. In some applications (depending on laser-diode parasitic inductance), an RC-shunt network between the laser cathode and ground helps minimize optical output aberrations. Starting values for most coaxial lasers are R = 75 in series with C = 3.3pF. These values should be experimentally adjusted until the optical output waveform is optimized.
Input Termination Requirement
The MAX3273 data and clock inputs are CML compatible. However, it is not necessary to drive the IC with a standard CML signal. As long as the specified differential voltage swings are met, the MAX3273 operates properly.
Calculating Power Consumption
The junction temperature of the MAX3273 dice must be kept below +150C at all times. The total power dissipation of the MAX3273 can be estimated by the following: P = VCC x ICC + (VCC - Vf) IBIAS + IMOD (VCC - 25 IMOD / 2) where I BIAS is the maximum bias current set by RBIASMAX, IMOD is the modulation current, and Vf is the typical laser forward voltage. Junction temperature = P(W) 37 (C/W)
10
______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Table 1. Optical Power Relations
PARAMETER Average Power Extinction Ratio Optical Power of a 1 Optical Power of a 0 Optical Amplitude Laser Slope Efficiency Modulation Current Threshold Current Bias Current Laser-to-Monitor Transfer SYMBOL PAVG re P1 P0 PP-P IMOD ITH IBIAS MON RELATION PAVG = (P0 + P1) / 2 r e = P1 / P 0 P1 = 2PAVGre / (re + 1) P0 = 2PAVG / (re + 1) PP-P = P1 - P0 = 2PAVG(re - 1) / (re + 1) = PP-P / IMOD IMOD = PP-P / P0 at 1 ITH IBIAS ITH + IMOD / 2 IMD / PAVG
Note: Assuming a 50% average input duty cycle and mark density.
Applications Information
An example of how to set up the MAX3273 follows.
Determine RMODSET
To achieve a minimum extinction ratio (re) of 6.6 over temperature and lifetime, calculate the required extinction ratio at +25C. Assuming re = 20, the peak-to-peak optical power PP-P = 1.81mW, according to Table 1. The required modulation current is 1.81mW/ (0.05mW/mA) = 36.2mA. The IMOD vs. RMODSET graph in the Typical Operating Characteristics shows that RMODSET should be 5k.
Select Laser
A communication-grade laser should be selected for 2.5Gbps/2.7Gbps applications. Assume the laser output average power is PAVG = 0, the minimum extinction ratio is re = 6.6 (8.2dB), the operating temperature is -40C to +85C, and the laser diode has the following characteristics: * Wavelength: = 1310nm * * * * Threshold Current: ITH = 22mA at +25C Threshold Temperature Coefficient: TH = 1.3%/C Laser-to-Monitor Transfer: MON = 0.2A/W Laser Slope Efficiency: = 0.05mW/mA at +25C
Determine RBIASMAX
Calculate the maximum threshold current (ITH(MAX)) at T A = +85C and end of life. Assuming I TH(MAX) = 50mA, the maximum bias current should be: IBIASMAX = ITH(MAX) + (IMOD / 2). In this example, IBIASMAX = 68.1mA. The I BIASMAX vs. R BIASMAX graph in the Typical Operating Characteristics shows that RBIASMAX should be 3.5k.
Determine RAPCSET
The desired monitor diode current is estimated by IMD = PAVG x MON = 200A. The IMD vs. RAPCSET graph in the Typical Operating Characteristics shows that RAPCSET should be 7.5k.
______________________________________________________________________________________ 11
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Interface Models
Figures 4 and 5 show simplified input and output circuits for the MAX3273 laser driver. If dice are used, replace package parasitic elements with bondwire parasitic elements.
Laser Safety and IEC 825
Using the MAX3273 laser driver alone does not ensure that a transmitter design is compliant with IEC 825. The entire transmitter circuit and component selections must be considered. Customers must determine the level of fault tolerance required by their application, recognizing that Maxim products are not designed or authorized for use as components in systems intended for surgical implant into the body, for applications intended to support or sustain life, or for any other application where the failure of a Maxim product could create a situation where personal injury or death may occur.
Wire-Bonding Die
For high-current density and reliable operation, the MAX3273 uses gold metalization. Make connections to the die with gold wire only, using ball-bonding techniques. Wedge bonding is not recommended. Die-pad size is 4 mils (100m) square, and die thickness is 14 mils (350m).
Layout Considerations
To minimize inductance, keep the connections between the MAX3273 output pins and laser diode as close as possible. Optimize the laser-diode performance by placing a bypass capacitor as close as possible to the laser anode. Use good high-frequency layout techniques and multilayer boards with uninterrupted ground planes to minimize EMI and crosstalk. TRANSISTOR COUNT: 1672 PROCESS: SiGe ISOLATED SUBSTRATE
Chip Information
12
______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
VCC VCC
PACKAGE 16k PACKAGE 0.9nH IN+ 0.1pF 5k 0.1pF VCC 0.9nH IN0.1pF 24k VCC 0.1pF 0.9nH OUT0.9nH OUT+
5k
Figure 4. Simplified Input Circuit
Figure 5. Simplified Output Circuit
Pin Configuration
APCFILT2 BIASMAX
OUTOUT+ N.C. VCC
Chip Topography
BIAS VCC VCC
FAIL
TOP VIEW
APCSET
APCFILT1 20
24
23
22
21
19
MD
GND
VCC DATA+ DATAVCC CLK+ CLK-
1 2 3 4 5 6
18 17 16
VCC OUTOUT+ VCC BIAS VCC
MD APCFILT1 APCFILT2 GND FAIL APCSET N.C.
GND GND MODSET N.C.
MAX3273
15 14 13
EN
N.C. GND LATCH GND
79 mil (2.01mm)
10
11
12
BIASMAX GND
7
8
9
MODSET
GND
LATCH
GND
EN
QFN*
*EXPOSED PAD IS CONNECTED TO GND.
GND
DATA+
CLK+
VCC
VCC
VCC
DATA-
64 mil (1.63mm)
______________________________________________________________________________________
CLK-
N.C.
13
+3.3V, 2.5Gbps Low-Power Laser Driver MAX3273
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 12,16,20, 24L QFN.EPS 14 ______________________________________________________________________________________
+3.3V, 2.5Gbps Low-Power Laser Driver
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX3273
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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